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Call for Participation: Second All Nepal FPGA Design Competition 2017

Digitronix Nepal has announced the Second All Nepal FPGA Design Competition 2017 for all hardware development enthusiasts in Nepal.

This competition is the continuation of “National FPGA Design Contest-2016”, which was organized at IOE Pulchowk Campus at July of 2016.

About FPGA

A field-programmable gate array (FPGA) is an integrated circuit that can be programmed in the field after manufacture. FPGAs are used by engineers in the design of specialized ICs that can later be produced hard-wired in large quantities for distribution to computer manufacturers and end users. Ultimately, FPGAs might allow computer users to tailor microprocessors to meet their own individual needs. The main part of FPGA design is the “Time to Market” which is time necessary for a specific product to design and launch in market so it  is less than other design methodologies.

Contest Timeline

  • Registration: Jan 30 –July 10, 2017 (Magh 17, 2073 -Ashad 26,2074)
  • Project idea submission: July 5, 2017 (Ashad 21,2074)
  • Project Progress submission: July 8, 2017 (Ashad 24, 2074)
  • Pre Project Demonstration: July 13, 2017(Ashad 29, 2074)
  • Final Project Demo and Prize Distribution: July 15, 2017 (Ashad 31 2074)


The winners will be decided by the jury based on hardware resource utilization, optimization, and operation/function of the project. The jury team is formed of the experts of the Hardware design (FPGA) from academic and professional institutions.

The prizes for this competition are:

  • Winner (First Prize): NRs. 20,000*
  • First Runner Up (Second Prize): NRs. 10,000*
  • Second Runner Up(Third Prize): NRs: 7,000*

All participants will get participation certificate. Plus the winners and some of the selected participants will be eligible to win internships from Digitronix Nepal in cooperation with Xilinx University Program Centers at different engineering college of Nepal.

To participate in this competition, fill up this form here.

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